3D stacking of chips: state of the industry?

[SammichPG]

http://www.extremetech.com/computing/119843-the-future-of-computers-3d-chip-stacking


3D stacking has been in the works for years and we're still talking/flaming/salivating on bidimensionsal chips while the potential benefits of an heterogeneous chip are said to be massive in price, performance and energy consumption, why haven't they hit the market yet?

Are there any significant challenges like machinery able to manifacture those chips, the glue needed to keep them together, the thermal issues with a buried chip or it's just cheaper to sell tiny amounts of (harder to manifacture) silicon instead of silicon sandwiches?

I have the feel that the industry is still milking the 2D chips while we could get a new 90s performance race out of 3D chips.

PS sorry about my engrish

 

[Idontcare]

2.5D and 3D chip stacking are difficult because of the reliability engineering that must be mastered before any company will be willing to take on the considerable financial liability that would come from selling a few billion dollars worth of product that could die in the field.

Look at the trouble Nvidia and their customers had to suffer just because a few solder bumps weren't as robust as they should have been on a plain-vanilla bump packaging process.

The reliability engineering that must be comprehended and vetted for 2.5D and 3D chip stacking is considerable, and that is what is delaying the timeline for its widespread adoption and introduction to the market place.

 

[slayernine]

Intel could make it happen, I bet they are working furiously on this and it is just far from being a reliable and stable manufacturing process.

 

[NTMBK]

Intel could make it happen, I bet they are working furiously on this and it is just far from being a reliable and stable manufacturing process.

Is this really Intel's domain? I thought that traditionally this stuff fell under "packaging", which other companies e.g. Amkor tend to be the leaders in, and foundries/fabs license their tech. I might be wrong though- IDC?

 

[Phynaz]

I thought the NAND used in SSD's was stacked?

 

[sm625]

Here's an article from amkor: http://www.google.com/url?sa=t&rct=...w4CQDg&usg=AFQjCNED_QjLsfFp06_SlArRf4iq_z_JPQ

 

[Blandge]

Is this really Intel's domain? I thought that traditionally this stuff fell under "packaging", which other companies e.g. Amkor tend to be the leaders in, and foundries/fabs license their tech. I might be wrong though- IDC?

Well I'd say there's probably a good reason Intel's building a $300M packaging R&D facility at the Chandler campus.

 

[NTMBK]

Well I'd say there's probably a good reason Intel's building a $300M packaging R&D facility at the Chandler campus.

Hah, told you I might be wrong

 

[Idontcare]

Intel could make it happen, I bet they are working furiously on this and it is just far from being a reliable and stable manufacturing process.

Is this really Intel's domain? I thought that traditionally this stuff fell under "packaging", which other companies e.g. Amkor tend to be the leaders in, and foundries/fabs license their tech. I might be wrong though- IDC?

Everybody in packaging is furiously working on this. If they don't then they stand to be on the losing end of a transistion to new packaging.

Opportunity drives new companies, fear drives old companies.

A few companies are pushing head-first into 2.5D and 3D because they see opportunity. Everyone else is pushing into it out of fear of being the odd-man out when it happens.

I thought the NAND used in SSD's was stacked?

They do. Chip stacking itself is nothing new per se. But those are usually done by wire-bonding very thin chips stacked on top of each other.

The new stuff that has everyone all abuzz is through-silicon-vias (TSV) and bumping within the stack.

The difference is akin to accessing the internet with a 14.4k modem versus your current FIOS DSL. One is good enough, whereas the other one truly enables new usage models.

 

[Fjodor2001]

How do you intend to solve the thermal issues?

Some years ago I heard about a CPU cooling solution that could turn the heat that the CPU/chip dissipates into energy. Sounds like an ideal solution that also would improve battery life. I wonder what has happened to that?

 

[Charles Kozierok]

I'm sure it's being worked on, but my guess is there are a number of technical challenges, and I don't think they are in a huge hurry because they can get similar results with stacked packages (which even Intel is using now).