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  1. aphorism

    question about blacklights

    thanks but this does not satisfy my curiosity. i want a highly technical answer or at least an explanation of how to calculate irradiance or whatever unit i am looking for.
  2. aphorism

    question about blacklights

    what i want to know is how much flux, or radiant energy, (or whatever you optics people call it) a standard 40W black light lamp outputs relative to the sun, and at UVA frequencies. for example is one hour of sunlight exposure equal to 10 hours of blacklight exposure? an explanation would be...
  3. aphorism

    Radeon HD5xxx filtering issue

    "As you can see, the MIP maps in our venerable D3D AF Tester are perfectly circular, the hallmark of an angle-independent implementation. With angle-independent filtering, this effectively marks the end of the filtering arms race. AMD has won, and should NVIDIA catch up in the future the two...
  4. aphorism

    Are 64 bits really faster than 32?

    then why did you double registers?!?!?!? a good x86-64 compiler should be able to beat a 32bit app by a decent margin. you'd have to ask a compiler guru for an accurate figure. oh and instructions are variable length. did you take any time to think about that? they add prefetch for...
  5. aphorism

    Why don't CPU makers have 'factory outlets', irregulars, etc.

    manufacturing costs are cheap, particularly for in-house fabs like intel. yields are very high because that's one of their main goals with their designs. when you sell at a level of volume like intel it can make a big difference.
  6. aphorism

    ARM announces 2GHZ -Dual Core Processor

    eDRAM: 2.7x smaller than intel's 45nm standard SRAM cell and 40% smaller than intel's 32nm standard SRAM cell. 7.9TB/s L3->L2 bandwidth.D: they have done more chip stacking research and currently have the best TSV/mm2 of anyone. their 45nm process uses the best low-k dielectric physically...
  7. aphorism

    What is the maximum # of cpu's that can be used for cgi rendering?

    it depends on the scene. ray tracing is more task parallel than data parallel. rather than running the same function over x pixels a ray tracer would do x functions per pixel. for a complex scene with many secondary rays you could send out 128*128 shadow rays or ~16,000 total shadow ray that...
  8. aphorism

    How much smaller can chips go? [article]

    yes, processing/repairing the mask design is a lot of the cost but there are some costs related to materials and other issues. for example intel's 22nm node uses computational lithography. according to ACML it requires a sustained 10tflops for 24hours to process one layer. on 22nm this could...
  9. aphorism

    How much smaller can chips go? [article]

    the cost of masks is on a per transistor basis, unlike ic's where all transistors are made simultaneously. the cost of masks has been doubling for many years. a 65nm mask set is ~3million dollars, a 45nm mask set is ~6million, 32nm is 12million, etc. also the number of masks is increasing...
  10. aphorism

    How much smaller can chips go? [article]

    yeah, computers would destroy us if they kept doubling in speed. we are already dependent on them. we could eventually make a processor faster than our own brain in every aspect, making humans useless, especially the ones that were once smart. also i would like to add that there are physical...
  11. aphorism

    How much smaller can chips go? [article]

    i think i could have dont a better job in a single post, no offense. yes, lithography is a big issue but that's not the only limitation. breakthroughs must occurr in almost every area from, doping, lithography, interconnect delay, leakage issues, etc. cost is probably going to be the largest...
  12. aphorism

    ARM announces 2GHZ -Dual Core Processor

    your example isnt exactly fair either. merced was a rushed, unfinished processor. improving upon it was not hard, all they needed was time. another thing i have never understood about itanium is that they use domino gates throughout the entire pipeline. that's not a good choice for something...
  13. aphorism

    ARM announces 2GHZ -Dual Core Processor

    2-3x would be a good guess although we are going through another ISA philosophy transition so it is becoming irrelevant. it is a very hard comparison because the two main x86 manufacturers have huge R&D budgets. intel could make an extremely fast RISC processor but it would open up room for...
  14. aphorism

    ARM announces 2GHZ -Dual Core Processor

    x86 has a lot of overhead not in area but in terms of circuit design, it is going to use a lot of power is very difficult to design. this will end up costing more pipeline stages or higher power consumption. x86 has to decode a lot more information too. instruction lengths must be decoded...
  15. aphorism

    First Bulldozer Numbers?

    it's an april fools joke. look at the date. edit: you beat me to it!
  16. aphorism

    I found the ultimate CPU test

    well, aside from implementation FFT in prime95 and MMM in linpack are the same thing. you can tweak the same variables in linx/linpack too. also 4096MB is ideal because there are two matrices. this would use 8MB of cache w/o touching main mem if tiled properly.
  17. aphorism

    Predictions thread: How large will Ontario's IGP be?

    then it will be multiples of 64. also i'm pretty sure they announced that 1st gen fusion graphics would be evergreen based.
  18. aphorism

    Predictions thread: How large will Ontario's IGP be?

    psssst some of the values you chose are impossible. each SIMD has 16 shaders with 5 alu's for 80sp's. you have to have multiples of 80.
  19. aphorism

    Intel Cache Latency Question

    yeah, i'd also like to see theoretical and net bandwidth of L3 caches on nehalem-EX vs. magny cores or power7. i think with parallelism in full steam and global wires delays increasing we will see more focus on interconnects and bus topologies. optical interconnects and carbon nanotubes look...
  20. aphorism

    Intel Cache Latency Question

    a few things to notice: the processors with the faster caches launched later. itanium's caches are very different. there is no L1 data cache for floating point. L2 caches typically have 10-11 cycle access latency. nehalem ex's L3 is probably slower because all 8 cores/ 16 threads share it.
  21. aphorism

    Why not skip vector extensions (avx) and focus on adding full vector units (gpgpu/apu

    interesting question. AVX is basically improved SSE with double the register size. i think one strategy of x86 makers is to avoid adding more cores thus scaling issues by adding wider SIMD to them. also programming models would be very different if the SIMD cores were not an extension of...
  22. aphorism

    AVX and FMA

    the avx paper is sort of vague on differentiating what the cpu's actually support in avx but apparently with vex prefix you can explicitly encode the registers so it can either be destructive or not. you can choose reg allocation with sse intrinsics too but it is not encoded like avx...
  23. aphorism

    AVX and FMA

    a little more in depth question: will MS support FMA3, FMA4 or both? SB will have FMA3 and BD will have FMA4 but will FMA4 be backwards compatible w/ FMA3?
  24. aphorism

    Global Foundries 32nm Process Status

    he doesnt have much details. all he really said was 32nm is using 45nm metal stack for all but one metal layer. i am assuming they are sacrificing performance to stay on schedule by reusing 45nm for half of the process.
  25. aphorism

    Global Foundries 32nm Process Status

    he is not referring to Hi-K in general, he is referring to gate first integration of HKMG. this implementation is simpler but not as fast as gate replacement. integrating metal is complex because you cant crystallize it like you can with other materials and you cant get the temperature of the...
  26. aphorism

    Without AMD (essentially an Intel Monopoly) What would CPUs cost?

    CUDA has always been based off of good old C. C++ is basically an augmented version of C with classes. i think what you are referring to is PTX which is a pseudo-assembly language. programs written in C for CUDA are compiled into PTX and then the compiler in the driver generates the code that...
  27. aphorism

    AMD Phenom II x6 vs I7 930

    you have no upgrade path if you go with 1156.
  28. aphorism

    AMD Bulldozer and Llano going to be delayed? GF 32nm troubles?

    AMD's 65nm process was just... bad. below 90nm smaller transistors are not necessarily more efficient. i think that was a major setback for barcelona aside from the tlb bug. comparing 65nm to 45nm you can see quite a difference in process quality. iirc the original phenoms were 2.3GHz quads...
  29. aphorism

    Without AMD (essentially an Intel Monopoly) What would CPUs cost?

    AMD has arguably the most successful VLIW processor. intel does x86 well but that's about it.
  30. aphorism

    Without AMD (essentially an Intel Monopoly) What would CPUs cost?

    i think cpu's would cost less. intel just posted record earnings in Q2. their profit margins are at 67%. people are paying through the nose for 32nm products. as a consumer this sucks but as an investor this rocks.
  31. aphorism

    How much electricity would be saved worldwide if Windows was writen in Assembly?

    cycles arent cheap for all applications. i really dont know about you but i need more compute power. hardware companies would not bother making faster hardware if it wasnt needed. they wouldnt spend time on things like avx or sse either. i can give you more info about the source code if i...
  32. aphorism

    How much electricity would be saved worldwide if Windows was writen in Assembly?

    meh. there are some libraries that will give you low level access to time but i dont really feel like taking it that far if the user cant even notice the difference.
  33. aphorism

    How much electricity would be saved worldwide if Windows was writen in Assembly?

    i already did, in less than 10 lines. i didnt output to a .txt file b/c that's not necessary. int main() { int c, time = GetTickCount(); for(int i=1; i<10000; i++)c = sqrt(i * i + i * i); time -= GetTickCount(); cout << time; return 0; }
  34. aphorism

    How much electricity would be saved worldwide if Windows was writen in Assembly?

    functionality is more important than performance. the whole point of an algorithm is to do something. speed is secondary especially when your example only takes milliseconds. i'll play your little game. i'm not a programmer by profession, i would consider myself a neophyte but i think that will...
  35. aphorism

    How much electricity would be saved worldwide if Windows was writen in Assembly?

    you think you will be able to beat a compiler by 2x and you say you are not good at writing assembly.:rolleyes: i can tell by that example you dont know what you are doing. that would take microseconds to finish and no one would waste their time optimizing it. in fact most of the time would...
  36. aphorism

    Graphics Cards Supplier Expects ATI’s “Southern Islands” to Show Up in Q4.

    when was the last time they did that?
  37. aphorism

    How much electricity would be saved worldwide if Windows was writen in Assembly?

    the cost of software development vastly exceeds the cost of hardware development. comparing the costs of intel's manufacturing to microsofts development teams is not fair.
  38. aphorism

    No longer motivated to OC

    i would say that depends on the chip. dynamic power increases linearly with respect to frequency. static power does not change with frequency. modern high perf chips have a fair amount of static power. if you make frequency the largest portion of power consumption you will increase efficiency.
  39. aphorism

    "PhysX hobbled on CPU by x87 code"

    i find it odd that bullet's use of SSE intrinsics is slower than MSVC's generated SSE code.
  40. aphorism

    Venture beat: Tilera's chips have lots of brains, one huge customer

    that thing is only 60 cores. but it runs 61,440 threads or so.