Recent content by pathare

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    Verilog help (module Instantiations and inverting a pin)

    Thank you for your suggestion. I had tried a bitwise not but I tried applying it directly to the 2 it was your suggestion to think about what I was actually applying the not to that did it. It works now : )
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    Verilog help (module Instantiations and inverting a pin)

    Im trying to write a program for a decoder using two smaller decoders instantized in a module. I can bring in the decoders no problem but I need to invert the enable bit on one of the two decoders and I cant figure out how. module mydecoder24vlog(en, in, out); input en; input [1:0]...