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Nothingness
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JustViewing's post
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Discussion
Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)
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Like
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Why does compiler has to support 2*4 decoder? It is invisible to software. While you may fine tune the code to get maximum throughput...
Aug 1, 2024
N
Nothingness
replied to the thread
Discussion
Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)
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That’s not my experience. Do you have any example where specifying a specific micro-architecture (as opposed to enable the use of new...
Aug 1, 2024
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Nothingness
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Discussion
What would be the most Consumer Friendly Naming scheme for (AMD) CPUs?
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If I said I used to have a 2017 Civic it doesn’t tell you it was not your typical Civic. It was a Type R FK8. That’s completely...
Aug 1, 2024
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Nothingness
reacted to
DAPUNISHER's post
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Discussion
What would be the most Consumer Friendly Naming scheme for (AMD) CPUs?
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Love
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I used to ride Honda CBR Hurricanes. That naming scheme appeals to me. They will have to stop following Intel and go their own way by...
Aug 1, 2024
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Nothingness
replied to the thread
Discussion
Qualcomm Snapdragon Thread
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1 pipe stage usually is 1 clock cycle, but that’s not always the case. IIRC the P4 was using double clock speed for its ALUs (where is...
Aug 1, 2024
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Nothingness
replied to the thread
Discussion
Qualcomm Snapdragon Thread
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@GTracing Good summary, thanks :) I would just add that even after dispatching instructions the penalty is variable due to instructions...
Aug 1, 2024
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Nothingness
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GTracing's post
in the thread
Discussion
Qualcomm Snapdragon Thread
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Like
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No, but adding pipeline stages allows designers to increase clockspeed. In an CPU with no pipelining, the core has to decode and...
Aug 1, 2024
N
Nothingness
replied to the thread
Discussion
Qualcomm Snapdragon Thread
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Counting pipeline stages makes little sense with modern processors. What you want to know is the branch mispredict latency in various...
Aug 1, 2024
N
Nothingness
replied to the thread
Question
Zen 6 Speculation Thread
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Even though SPEC tries to abstract as much as possible score results from platform specific things, there's not much you can do about...
Aug 1, 2024
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Nothingness
replied to the thread
Question
Zen 6 Speculation Thread
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I’m not sure it makes sense to average INT and FP scores in general. Design choices are very different if you want to target high FP...
Aug 1, 2024
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Nothingness
replied to the thread
Question
Zen 6 Speculation Thread
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Heh, I might regret having written that 😀 It's what I hope to see based on my past experience of a good redesign (which Zen5 is) and...
Aug 1, 2024
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Nothingness
reacted to
moinmoin's post
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Question
Zen 6 Speculation Thread
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Different markets different targets. ARM cores to this day are mobile first. That's slowly changing. Though the destination seems...
Aug 1, 2024
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Nothingness
reacted to
Doug S's post
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Question
Zen 6 Speculation Thread
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Apple is coming from much lower clock rates, so it is much easier for them to meaningfully gain frequency without blowing up power too...
Aug 1, 2024
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Nothingness
reacted to
gdansk's post
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Zen 6 Speculation Thread
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That's for another thread but I suspect they'll be better off with a focus on clock rate for a bit - at least it worked for Apple.
Aug 1, 2024
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Nothingness
reacted to
CouncilorIrissa's post
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Zen 6 Speculation Thread
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I know there was a discussion about the frequency/IPC tradeoff that x86 manufacturers are making and how they are chasing the highest...
Aug 1, 2024
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