Oops. I don't follow threadripper much. The company I am working for is spec'ing new systems now, so I am mostly interested in epyc. It looks like turin will not come out in time though, so I will be working with genoa for the next few years. The chassis are power limitied on the cpu, so...
The 8004 (siena) processors seem a bit weird. I was trying to determine the chiplet and IO die organization. I had a similar issue with the 9124 and 9224. The epyc wikipedia article initially listed the 9124 as a 2 CCD device and the 9224 as a 3 CCD device. That seemed very unlikely to me...
It doesn't make sense to put v-cache on low end consumer cpu packages. That wouldn't be very profitable. They get the best return on the higher end parts, although that probably still low compared to Epyc v-cache parts. The 16-core epyc x-series is listed at $4928, the 32-core is listed at...
I don't have time to read this whole thread. I was wondering if anyone has done or seen a die size analysis for zen5c? It seemed weird that initial official pictures were all at an angle while the regular zen5 was straight top down photo, but looked like they showed a top down photo in the...
Thanks for the info. It has been unclear for a while whether the IO die actually had 12 or 16 GMI links. Perhaps with 16 they can actually make some dual link parts with 8 CCD. Someone else said somewhere that they never actually made a part using dual links to each CCD. If they only had 12...
I was assuming that it is still 2 CCX per die like it is in zen4c. Do you have something indicating that they changed that? It seems unlikely. In zen 4, the infinity fabric connection seemed to be along the long edge of the cpu die. Looking at the weird aspect ratio of Zen5c, it looks like...
I haven't been following this for a while, so I might be missing something.
The zen5c dies look too long to just be 16 Zen5c cores unless it is a really different layout. Is there supposed to be something else on there, like more cache, an NPU, or something?
I have not had time to keep up with rumors lately so perhaps this has already been discussed. I am not searching back through ~300 pages of speculation.
I see Turin information saying 128 Zen 5 cores or 192 Zen 5c cores. 192 Zen 5c cores make sense (16 cores * 12 CCDs). How do we get 128...
Seems like it should be named something else if it uses bumps.
Stix Halo looks more like just using desktop chiplets in mobile, except with big gpu + infinity cache in IO die. It doesn't seem like it brings much in the way of system design changes except for the on package memory. I was...
I don't have time to wade through this thread; seems to be a lot of off topic stuff recently.
Anyway, I was thinking about the CPUs used on MI300. They seem to be specialized to stack on top of the base die, but I don't know if they use SoIC or some micro-bump tech? The cpu doesn't really...
It would be great if they could do that, but it seems like the package may be too expensive. The Mi300 base die also likely doesn't contain anything other than HBM interfaces, GMI, and whatever they are using for the base die to base die links. I don't know if that is known yet? It doesn't...
It is a bit odd, there is still a big price difference between 6 or 8 cores and anything above that. A 6 core part with 32MB L3 is going to perform well for most games. Looking at the steam survey, 4 core parts are actually increasing. It was near 50% 6 core parts and now that is down near...
Intel tried to stay at 4 cores for the mainstream market for way too long so that they could charge really high prices for anything above that. AMD came along and offered a much more reasonalble price up to 16 cores and then dominated almost everything else with Epyc scalability. Above 4 was...
I don't think we will see a mixed chiplet with both types of cores in the same die, as some have talked about, but they appear to be going to mix dense and regular cores in APUs, if the rumors can be trusted. I was wondering if the dense and regular chiplets are actually made on the same...
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