Recent content by gOJDO_n

It's not the CMT what made Bulldozer a inefficient, but the rest of the architecture. I expect AMD to reimplement it in Zen2 or Zen3 together with SMT for a quad thread module or core... Sent from my SM-G935F using Tapatalk

Thats why my last enthusiast MSI mainboard was with the VIA KT266A chipset...Asus FTW! **Spam Removed** Daveybrat Admin

I don't believe that there would be any changes in the core microarchitecutre. But I belive that its pipeline logic will be fine tunned for higher clocks. I expect it to get improved macro-architecture with a much faster IF, PCI-e 4.0 and the precision boost 2 which is present in the Raven Ridge...

No, it's not working that way! Ryzen has very high RAM latency because the IMC is not connected directly but over the IF.

The usage of TIM will not reduce the power usage, but will reduce the cores temperature. As for the performance/watt, CoffeLake CPUs already have 15~20% better performance/watt than Ryzen (8600K vs 1600X, 8700K vs 1800X). And I believe that Intel will introduce new Turbo-Boost with a smarter and...

Intel have many reasons not to let AMD to overtake a CPU crown in any segment. They already have learned the lesson 15 years ago with Athlon/Athlon64 and Opteron. Such 8 core desktop CPU like the i7 9700K would be a double-edge sword for Intel. It will compete with Ryzen 7 and ThreadRipper with...

Nice finding! Now we can safely address the problem, it is the Infinity Fabric which adds latency to all the traffic going through it! To reduce the latency AMD need a serious bump in IF clock or it has to completely redesign the IF, which IMHO is impossible with the 12nm Zen+ refresh.

It doesn't matter who is right and who is wrong, we are humans so we can learn and there is nothing wrong with it. So, lets clear up the things. Back in the days FSB or Front Side Bus was used as a term for a system bus connecting the CPU to all the system's I/O, while the BSB or Back Side Bus...

This is apples to watermelons comparison. The number of stages is absolutely irrelevant when comparing frequencies of completely different architectures on the same lithography node. Its like comparing two people, one eating 3 apples and the other 2 watermelons. So, who ate more fruits?

Let's not confuse TDP with power cosnumption/heat dissipation. These are completely different things, let alone the differences of how TDP is determined on different CPUs using different architecture or lithography node. The miracle behind Ryzen 2000 APUs is that they share the same power...

AMD used the FSB starting from their first x86 CPU, the K5, until K8. From K8 to ZEN the AMD CPUs were using HTT as a direct point-to-point connection to the chipset and to other CPUs, while the Northbridge including the Memory Controller was moved to the CPU, where the IMC was directly...

Q6600 V2 is a Q6600 Rev G0 which OC much better than the Q6600 B3. The Q6600(Kentsfield) is 2.4GHz(9x266) with 2x4MB L2 FSB1066 65nm, while the Q8400(Yorkfield) 2.66GHz(8x333) 2x2MB L2 FSB1333 45nm is a derivate with only 1/3 of the available L2 enabled. The Q6600 is a much better option for OC...

Well the "new" i3 are so "old" i5...and z370 mainboards are so expensive. If I was you for the same budget I was going to look at a B350 mainboard and a Ryzen 7 1600 for the same money. With or without OC it should wipe the floor with the i3 8100 in almost all the apps known to mankind.

If I was you, I was going to use that Q8400 as a key-chain. :D Anyway, If you have enough free time, some money to waste and you want to play with antiques then its OK whatever you do. But if you are asking from consumer perspective what to do then there is no point in wasting a cent for such an...

TR is using two links for connecting the dies and has twice die-to-die bandwidth compared to EPYC.