Recent content by Geddagod

Hard to tell if Apple cores will perform as well in server as they are doing currently in client. I don't think Apple's cache hierarchy will cut it in servers. Which is also why I'm very interested in seeing how Qualcomm's server CPUs go, since they use a similar hierarchy. That and also...

The entire point of BSPD is supposed to be for these type of products. Look at Intel's points on the benefits of BSPD, it's about increasing Fmax. Whatever thermal hotspot concerns they have, they mitigated (on their Intel 4 test chip), much like they have been mitigating for years- thermal...

18A-P is supposed to look best in HPC and high-voltage instances such as desktop. If 18A-P is not competitive there vs N2, I shudder to imagine the difference in the lower end of the v/f curve that the cores in server skus will be handling. Which is the more important metric for server skus...

If 18A-P is anywhere near N2 in PPA, NVL-S would not be N2.

It's supposed to be a tock core. Problem is that the leaked NVL ST perf slide is horrendous, so IPC uplift might honestly be on par with LNC or even less, not GLC or SNC level. I doubt it's nothing to negative gains. Negative gains especially make no sense.... Realistically, I doubt Zen 6 vs...

Is that dude not just a random user? The rest of the thread seems to be Intel just saying we can't comment on future products. I also don't think the leak specifies that it would lower the ring stops either, I think that's just speculation from the rumor.

Disclaimer: Haven't done a sanity check yet, so if there are any obvious mistakes, feel free to point them out. Plan on doing that, as well as adding more cores, later. Chart: Red: TSMC (N4P, N4, N5 etc etc) Green: Samsung (5LPE, 4LPE, 4LPP, etc etc) Blue: Intel (Intel 4) Data labels : core...

I'm saying the Zen 5C variant also exhibits that same trait. Each CPU is supposed to do 1510 while two CPUs manage to miraculously do 1550 per CPU. It doesn't seem to be a typo, but due to the litany of potential reasons the other people have posted in this thread. Pretty sure Zen 5 is ahead...

And yet GNR is within striking range of Turin classic. Diamond Rapids should have P-cores with similar IPC vs Venice too, something which GNR did not enjoy. You are seeing ghosts dude. Not a single person here is saying GNR is better than Turin lol. Wdym Igh dude lol.

The term BOM was never once mentioned in that comment, because no one was talking about it up till now lol. Who ever said GNR was the better product? Why do you think that would happen? This prob will end up being true. We will see though. You aren't him, bro. Could be, honestly, idk, but...

Which picture do you think is more accurate? The one posted by AMD themselves at an actual tech conference, or Phoronix? EMR ended up looking so much closer to AMD than it should have been due to this True Look at who you are quoting lol lol The CPU in question is Turin, and the data is...

I mean GNR is already competitive with Turin standard iso power, according to AMD. Turin Dense has like a 25% lead. I fully expect Intel's server position relative to AMD to only get better from here, since they are releasing more competitive products compared to EMR vs Genoa, and GNR ramps.

Area Two measurements I think are the most important: CCX and Core only (not including core private L2/L1.5) CCX encapsulates the entire CPU area of the SOC Core only area to evaluate specifically the core IP itself. The reason I did not include the L2 (despite it being core private) is that...