Hi
I am trying to find out why the TLB size from my CPU changes depending from the page size:
$ cpuid | grep -i tlb
cache and TLB information (2):
0x5a: data TLB: 2M/4M pages, 4-way, 32 entries
0x55: instruction TLB: 2M/4M pages, fully, 7 entries
0x03: data...