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NNothingness replied to the thread Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads.Again proving your total lack of experience on the subject. Words are being overused even by experts. I've heard several CPU designers...
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NNothingness reacted to 511's post in the thread Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads with
Like.
well AMD's Architects seems to believe it -
NNothingness replied to the thread Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads.Again, they might have implemented them and didn't enable them before going to synthesis. That's it. It's also possible that full...
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NNothingness replied to the thread Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads.You're inventing things with exactly nothing to back your claim. I'm not saying parts of the die were disabled. I'm saying parts of the...
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NNothingness replied to the thread Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads.Parts of a design can be removed before going into synthesis. Your claim proves nothing at all
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NNothingness replied to the thread Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads.Do you really think a well known designer as Bob Colwell would make such a blatant lie? I know some people make huge claims because they...
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NNothingness reacted to 511's post in the thread Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads with Like.
Ok so you are saying one of the Chief architects of x86 of his time is lying that's pretty bold of you
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NNothingness reacted to 511's post in the thread Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads with Like.
Intel had it designed as well they were super focused on Itanium they didn't wanted AMD to have thier money making x86 license...
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NI took the thread to be focused on CPUs that were consumer desktop/console/laptop focused. I also took it to mean the full spec version...
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NSorry for being a nag, but the thread title is "worst CPU's ever", not "worst x86-ish CPU's ever." I'll even allow the reading of...
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NNothingness reacted to Win2012R2's post in the thread Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads with Like.
So then are AVX-512 registers in Zen 4 also 512 bit only on paper because execution is double pumped and data path can't load whole...
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NNothingness reacted to Win2012R2's post in the thread Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads with Like.
The size of SSE registers, however, was, is and will always be - 128 bits, even if there is no single data type that is 128 bits, which...
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NI don't know if this belongs here, but it sure won't hurt: Source
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NNothingness reacted to johnsonwax's post in the thread Question Intel's future after Pat Gelsinger with Like.
The reason why both AMD and Intel are losing to Apple on performance potential is not because of management or engineering, but lack of...
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NNothingness reacted to MS_AT's post in the thread Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads with Like.
Nope, they are not spilled over to the stack because compiler is storing results on the stack because array is kept there;) So in other...
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